Source-Level Support for Timing Analysis

Timing analysis is an important prerequisite for the design of embedded real-time systems. In order to get tight and safe bounds for the timing of a program, precise information about its control flow and data flow is needed. While actual timings can only be derived from the machine code, many of the supporting analyses (deriving timing-relevant data such as points-to and loop bound information) operate much more effectively on the source code level. At this level, they can use high-level information that would otherwise be lost during the compilation to machine code. During the optimization stage, compilers often apply transformations, such as loop unrolling, that modify the program’s control flow. Such transformations can invalidate information derived from the source code. In our approach, we therefore apply such optimizations already at the source-code level and transform the analyzed information accordingly. This way, we can marry the goals of precise timing analysis and optimizing compilation. In this article we present our implementation of this concept within the SATIrE source-to-source analysis and transformation framework. SATIrE forms the basis for the TuBound timing analyzer. In the ALL-TIMES EU FP7 project we extended SATIrE to exchange timing-relevant analysis data with other European timing analysis tools. In this context, we explain how timing-relevant information from the source code level can be communicated to a wide variety of tools that apply various forms of static and dynamic analysis on different levels. 1 This work was supported by the Austrian Science Fund (Fonds zur Förderung der wissenschaftlichen Forschung) under contracts P18925-N13, Compiler Support for Timing Analysis (CoSTA), http://costa.tuwien.ac.at/ and P21842, Optimal Code Generation for Explicitly Parallel Processors, http://www.comp lang.tuwien.ac.at/epicopt/, and the Commission of the European Union within the 7th EU R&D Framework Programme under contract 215068, Integrating European Timing Analysis Technology (ALL-TIMES), http://www.mrtc.mdh.se/projects/alltimes/. 2 The author is now at Lawrence Livermore National Laboratory, P.O. Box 808, 94551 Livermore, CA.